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authorShunqian Zheng <zhengsq@rock-chips.com>2016-09-01 01:06:22 +0200
committerHeiko Stuebner <heiko@sntech.de>2016-09-04 22:58:06 +0200
commitfd75b345bb3d97ee4b2aad1d313e8ffe627ce7e7 (patch)
tree3fef7c480bbb807d478ad7ce9efbc328c373d75c /drivers/clk/rockchip
parentclk: rockchip: add rk3399 ddr clock support (diff)
downloadlinux-fd75b345bb3d97ee4b2aad1d313e8ffe627ce7e7.tar.xz
linux-fd75b345bb3d97ee4b2aad1d313e8ffe627ce7e7.zip
clk: rockchip: add 2016M to big cpu clk rate table on rk3399
We would prefer the 2016M as 2.0G than 1992M which seems odd, adding it to big cpu clk rate table then we can set 2016M in dts. Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Reviewed-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip')
-rw-r--r--drivers/clk/rockchip/clk-rk3399.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index c284c0118516..ea32b7e0ef34 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -379,6 +379,7 @@ static struct rockchip_cpuclk_rate_table rk3399_cpuclkb_rates[] __initdata = {
RK3399_CPUCLKB_RATE(2184000000, 1, 11, 11),
RK3399_CPUCLKB_RATE(2088000000, 1, 10, 10),
RK3399_CPUCLKB_RATE(2040000000, 1, 10, 10),
+ RK3399_CPUCLKB_RATE(2016000000, 1, 9, 9),
RK3399_CPUCLKB_RATE(1992000000, 1, 9, 9),
RK3399_CPUCLKB_RATE(1896000000, 1, 9, 9),
RK3399_CPUCLKB_RATE(1800000000, 1, 8, 8),