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authorJianqun Xu <jay.xu@rock-chips.com>2016-11-16 01:19:41 +0100
committerHeiko Stuebner <heiko@sntech.de>2016-11-16 11:57:29 +0100
commit9c496033b3b4a7d8c832018b471e20c1fc988504 (patch)
tree1f397d65cec989e9c9d8c310243979d79495909b /drivers/clk/rockchip
parentclk: rockchip: validity should be checked prior to cpu clock rate change (diff)
downloadlinux-9c496033b3b4a7d8c832018b471e20c1fc988504.tar.xz
linux-9c496033b3b4a7d8c832018b471e20c1fc988504.zip
clk: rockchip: fix copy-paste error in rk3399 testclk
Fix RK3368_* to RK3399_* for rk3399 clk_test clock. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip')
-rw-r--r--drivers/clk/rockchip/clk-rk3399.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index 828005556376..3490887b0579 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1383,8 +1383,8 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
/* clk_test */
/* clk_test_pre is controlled by CRU_MISC_CON[3] */
COMPOSITE_NOMUX(0, "clk_test", "clk_test_pre", CLK_IGNORE_UNUSED,
- RK3368_CLKSEL_CON(58), 0, 5, DFLAGS,
- RK3368_CLKGATE_CON(13), 11, GFLAGS),
+ RK3399_CLKSEL_CON(58), 0, 5, DFLAGS,
+ RK3399_CLKGATE_CON(13), 11, GFLAGS),
/* ddrc */
GATE(0, "clk_ddrc_lpll_src", "lpll", 0, RK3399_CLKGATE_CON(3),