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| author | Jim Quinlan <jim2101024@gmail.com> | 2015-05-15 21:45:47 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-07-28 20:59:19 +0200 |
| commit | afe76c8fd030dd6b75fa69f7af7b7eb1e212f248 (patch) | |
| tree | fcf7c6f403d54380eeef1b549a7197cc8dfa756e /drivers/clk/samsung/clk-exynos3250.c | |
| parent | clk: socfpga: switch to GENMASK() (diff) | |
| download | linux-afe76c8fd030dd6b75fa69f7af7b7eb1e212f248.tar.xz linux-afe76c8fd030dd6b75fa69f7af7b7eb1e212f248.zip | |
clk: allow a clk divider with max divisor when zero
This commit allows certain Broadcom STB clock dividers to be used with
clk-divider.c. It allows for a clock whose field value is the equal
to the divisor, execpt when the field value is zero, in which case the
divisor is 2^width. For example, consider a divisor clock with a two
bit field:
value divisor
0 4
1 1
2 2
3 3
Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/samsung/clk-exynos3250.c')
0 files changed, 0 insertions, 0 deletions