diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2020-08-06 20:20:22 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-19 20:58:05 +0200 |
| commit | 346f183cc1348cbf3814796afab0ea34475152a9 (patch) | |
| tree | 2b299af587c11cd3101b77621f1d8d1cb6b9065a /drivers/clk/samsung | |
| parent | ARM: s3c24xx: iotiming: make functions static (diff) | |
| download | linux-346f183cc1348cbf3814796afab0ea34475152a9.tar.xz linux-346f183cc1348cbf3814796afab0ea34475152a9.zip | |
ARM: s3c24xx: make S3C24XX_MISCCR access indirect
The clk driver uses both a function call into an exported
platform file and a direct register access to a hardcoded
virtual address for accessing the MISCCR register, both
become are a problem for a multiplatform kernel because
of the header file dependency.
Make this an indirect function call through platform data
instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-5-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'drivers/clk/samsung')
| -rw-r--r-- | drivers/clk/samsung/clk-s3c2410-dclk.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c index 7dad9098e897..3e0f23e8ec21 100644 --- a/drivers/clk/samsung/clk-s3c2410-dclk.c +++ b/drivers/clk/samsung/clk-s3c2410-dclk.c @@ -14,10 +14,6 @@ #include <linux/module.h> #include "clk.h" -/* legacy access to misccr, until dt conversion is finished */ -#include <mach/hardware.h> -#include <mach/regs-gpio.h> - #define MUX_DCLK0 0 #define MUX_DCLK1 1 #define DIV_DCLK0 2 @@ -52,6 +48,7 @@ struct s3c24xx_clkout { struct clk_hw hw; u32 mask; u8 shift; + unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg); }; #define to_s3c24xx_clkout(_hw) container_of(_hw, struct s3c24xx_clkout, hw) @@ -62,7 +59,7 @@ static u8 s3c24xx_clkout_get_parent(struct clk_hw *hw) int num_parents = clk_hw_get_num_parents(hw); u32 val; - val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift; + val = clkout->modify_misccr(0, 0) >> clkout->shift; val >>= clkout->shift; val &= clkout->mask; @@ -76,7 +73,7 @@ static int s3c24xx_clkout_set_parent(struct clk_hw *hw, u8 index) { struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw); - s3c2410_modify_misccr((clkout->mask << clkout->shift), + clkout->modify_misccr((clkout->mask << clkout->shift), (index << clkout->shift)); return 0; @@ -110,6 +107,7 @@ static struct clk_hw *s3c24xx_register_clkout(struct device *dev, clkout->shift = shift; clkout->mask = mask; clkout->hw.init = &init; + clkout->modify_misccr = dev->platform_data; ret = clk_hw_register(dev, &clkout->hw); if (ret) |