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| author | Dinh Nguyen <dinguyen@kernel.org> | 2018-03-21 15:20:12 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-04-06 19:12:35 +0200 |
| commit | 07afb8db7340f9b6051a26c5c28f2ce74148f6b5 (patch) | |
| tree | 0832c3b259b1427d079c8c574a99f266dd63b8b0 /drivers/clk/socfpga/Makefile | |
| parent | dt-bindings: documentation: add clock bindings information for Stratix10 (diff) | |
| download | linux-07afb8db7340f9b6051a26c5c28f2ce74148f6b5.tar.xz linux-07afb8db7340f9b6051a26c5c28f2ce74148f6b5.zip | |
clk: socfpga: stratix10: add clock driver for Stratix10 platform
Add a clock driver for the Stratix10 SoC. The driver is similar to the
Cyclone5/Arria10 platforms, with the exception that this driver only uses
one single clock binding.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga/Makefile')
| -rw-r--r-- | drivers/clk/socfpga/Makefile | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index 9146c20fe21f..ce5aa7802eb8 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,6 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += clk.o -obj-y += clk-gate.o -obj-y += clk-pll.o -obj-y += clk-periph.o -obj-y += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o +obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o +obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o +obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o +obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o |