diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2020-05-12 20:16:44 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-27 04:13:05 +0200 |
| commit | 535d936f6103caee3daa0fb2be180aaed322a8b9 (patch) | |
| tree | 8faf68e79c3faad3c5f1310dfa0e153f5deaef5b /drivers/clk/socfpga | |
| parent | clk: socfpga: stratix10: use new parent data scheme (diff) | |
| download | linux-535d936f6103caee3daa0fb2be180aaed322a8b9.tar.xz linux-535d936f6103caee3daa0fb2be180aaed322a8b9.zip | |
clk: socfpga: remove clk_ops enable/disable methods
The enable/disable clock ops are already defined in the standard clock
ops, so we don't need to assign them.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200512181647.5071-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/socfpga')
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-a10.c | 2 | ||||
| -rw-r--r-- | drivers/clk/socfpga/clk-pll-s10.c | 2 | ||||
| -rw-r--r-- | drivers/clk/socfpga/clk-pll.c | 2 |
3 files changed, 0 insertions, 6 deletions
diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c index 3816fc04b274..6d9395106c0c 100644 --- a/drivers/clk/socfpga/clk-pll-a10.c +++ b/drivers/clk/socfpga/clk-pll-a10.c @@ -102,8 +102,6 @@ static struct clk * __init __socfpga_pll_init(struct device_node *node, pll_clk->hw.hw.init = &init; pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; - clk_pll_ops.enable = clk_gate_ops.enable; - clk_pll_ops.disable = clk_gate_ops.disable; clk = clk_register(NULL, &pll_clk->hw.hw); if (WARN_ON(IS_ERR(clk))) { diff --git a/drivers/clk/socfpga/clk-pll-s10.c b/drivers/clk/socfpga/clk-pll-s10.c index bcd3f14e9145..9faa80ff3b53 100644 --- a/drivers/clk/socfpga/clk-pll-s10.c +++ b/drivers/clk/socfpga/clk-pll-s10.c @@ -138,8 +138,6 @@ struct clk *s10_register_pll(const struct stratix10_pll_clock *clks, pll_clk->hw.hw.init = &init; pll_clk->hw.bit_idx = SOCFPGA_PLL_POWER; - clk_pll_ops.enable = clk_gate_ops.enable; - clk_pll_ops.disable = clk_gate_ops.disable; clk = clk_register(NULL, &pll_clk->hw.hw); if (WARN_ON(IS_ERR(clk))) { diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c index dc65cc0fd3bd..a001641b2f42 100644 --- a/drivers/clk/socfpga/clk-pll.c +++ b/drivers/clk/socfpga/clk-pll.c @@ -105,8 +105,6 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node, pll_clk->hw.hw.init = &init; pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; - clk_pll_ops.enable = clk_gate_ops.enable; - clk_pll_ops.disable = clk_gate_ops.disable; clk = clk_register(NULL, &pll_clk->hw.hw); if (WARN_ON(IS_ERR(clk))) { |