diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2015-08-12 20:42:23 +0200 |
---|---|---|
committer | Michael Turquette <mturquette@baylibre.com> | 2015-08-25 01:49:12 +0200 |
commit | 836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3 (patch) | |
tree | 8373b393c080d72c4f0fa240951babe06a9b8a55 /drivers/clk/st/clkgen-fsyn.c | |
parent | clk: Constify clk_hw argument to provider APIs (diff) | |
download | linux-836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3.tar.xz linux-836ee0f7d95c3feb742bd4b3a02fea3fe75bdef3.zip |
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
Use the provider based method to get a clock's name so that we
can get rid of the clk member in struct clk_hw one day. Mostly
converted with the following coccinelle script.
@@
struct clk_hw *E;
@@
-__clk_get_name(E->clk)
+clk_hw_get_name(E)
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Kevin Cernekee <cernekee@chromium.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/st/clkgen-fsyn.c')
-rw-r--r-- | drivers/clk/st/clkgen-fsyn.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index aa3117db4514..83ccf142ff2a 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -513,7 +513,7 @@ static unsigned long quadfs_pll_fs660c32_recalc_rate(struct clk_hw *hw, params.ndiv = CLKGEN_READ(pll, ndiv); if (clk_fs660c32_vco_get_rate(parent_rate, ¶ms, &rate)) pr_err("%s:%s error calculating rate\n", - __clk_get_name(hw->clk), __func__); + clk_hw_get_name(hw), __func__); pll->ndiv = params.ndiv; @@ -558,7 +558,7 @@ static long quadfs_pll_fs660c32_round_rate(struct clk_hw *hw, unsigned long rate clk_fs660c32_vco_get_rate(*prate, ¶ms, &rate); pr_debug("%s: %s new rate %ld [sdiv=0x%x,md=0x%x,pe=0x%x,nsdiv3=%u]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv, (unsigned int)params.pe, (unsigned int)params.nsdiv); @@ -581,7 +581,7 @@ static int quadfs_pll_fs660c32_set_rate(struct clk_hw *hw, unsigned long rate, clk_fs660c32_vco_get_rate(parent_rate, ¶ms, &hwrate); pr_debug("%s: %s new rate %ld [ndiv=0x%x]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), hwrate, (unsigned int)params.ndiv); if (!hwrate) @@ -745,7 +745,7 @@ static int quadfs_fsynth_enable(struct clk_hw *hw) struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); unsigned long flags = 0; - pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); + pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); quadfs_fsynth_program_rate(fs); @@ -770,7 +770,7 @@ static void quadfs_fsynth_disable(struct clk_hw *hw) struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); unsigned long flags = 0; - pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); + pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); if (fs->lock) spin_lock_irqsave(fs->lock, flags); @@ -787,7 +787,7 @@ static int quadfs_fsynth_is_enabled(struct clk_hw *hw) u32 nsb = CLKGEN_READ(fs, nsb[fs->chan]); pr_debug("%s: %s enable bit = 0x%x\n", - __func__, __clk_get_name(hw->clk), nsb); + __func__, clk_hw_get_name(hw), nsb); return fs->data->standby_polarity ? !nsb : !!nsb; } @@ -946,10 +946,10 @@ static unsigned long quadfs_recalc_rate(struct clk_hw *hw, if (clk_fs_get_rate(parent_rate, ¶ms, &rate)) { pr_err("%s:%s error calculating rate\n", - __clk_get_name(hw->clk), __func__); + clk_hw_get_name(hw), __func__); } - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; } @@ -962,7 +962,7 @@ static long quadfs_round_rate(struct clk_hw *hw, unsigned long rate, rate = quadfs_find_best_rate(hw, rate, *prate, ¶ms); pr_debug("%s: %s new rate %ld [sdiv=0x%x,md=0x%x,pe=0x%x,nsdiv3=%u]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv, (unsigned int)params.pe, (unsigned int)params.nsdiv); |