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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-05-27 12:02:19 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-06-05 14:32:08 +0200 |
| commit | b467ec063ec56900e1ebba4d5aeb50b0a7cb0ef8 (patch) | |
| tree | 482e523f9774437f076b7147c21bbb2182e93ed0 /drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c | |
| parent | clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register (diff) | |
| download | linux-b467ec063ec56900e1ebba4d5aeb50b0a7cb0ef8.tar.xz linux-b467ec063ec56900e1ebba4d5aeb50b0a7cb0ef8.zip | |
dt-bindings: clk: Convert Allwinner CCU to a schema
The Allwinner SoCs have a clocks controller supported in Linux, with a
matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c')
0 files changed, 0 insertions, 0 deletions