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| author | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-22 04:19:46 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-22 04:19:46 +0200 |
| commit | de000a88c159268e6bf8ac9c06de7d0a5f19f644 (patch) | |
| tree | adf8912e65e7f784a32d118823842713dd1ae41c /drivers/clk/sunxi-ng/ccu-sun9i-a80.c | |
| parent | clk: hi6220: Add the hi655x's pmic clock (diff) | |
| parent | clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code (diff) | |
| download | linux-de000a88c159268e6bf8ac9c06de7d0a5f19f644.tar.xz linux-de000a88c159268e6bf8ac9c06de7d0a5f19f644.zip | |
Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into HEAD
Pull Allwinner clock changes, take 2 from Maxime Ripard:
A few minor bug and comment fixes, plus some fixes for the PRCM CCU driver
merged in the prior pull request
* tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code
clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatch
clk: sunxi-ng: use 1 as fallback for minimum multiplier
clk: sunxi-ng: fix PRCM CCU CLK_NUMBER value
clk: sunxi-ng: fix PRCM CCU ir clk parent
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu-sun9i-a80.c')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun9i-a80.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c index 51f6d495de5b..8936ef87652c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun9i-a80.c +++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80.c @@ -70,8 +70,7 @@ static struct ccu_mult pll_c1cpux_clk = { /* * The Audio PLL has d1, d2 dividers in addition to the usual N, M * factors. Since we only need 2 frequencies from this PLL: 22.5792 MHz - * and 24.576 MHz, ignore them for now. Enforce the default for them, - * which is d1 = 0, d2 = 1. + * and 24.576 MHz, ignore them for now. Enforce d1 = 0 and d2 = 0. */ #define SUN9I_A80_PLL_AUDIO_REG 0x008 |