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authorChen-Yu Tsai <wens@csie.org>2017-09-29 10:22:53 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-09-29 10:46:10 +0200
commit80815004a45fc68b6e34653af4fca47be7fb96ed (patch)
tree1111cc49b4fe5cf1f69443a7bc7d5c7cd5684cfe /drivers/clk/sunxi-ng
parentclk: sunxi-ng: Implement reset control status readback (diff)
downloadlinux-80815004a45fc68b6e34653af4fca47be7fb96ed.tar.xz
linux-80815004a45fc68b6e34653af4fca47be7fb96ed.zip
clk: sunxi-ng: sun6i: Export video PLLs
The 2x outputs of the 2 video PLL clocks are directly used by the HDMI controller block. Export them so they can be referenced in the device tree. Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng')
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun6i-a31.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.h b/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
index 4e434011e9e7..27e6ad4133ab 100644
--- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
+++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.h
@@ -27,7 +27,9 @@
#define CLK_PLL_AUDIO_4X 4
#define CLK_PLL_AUDIO_8X 5
#define CLK_PLL_VIDEO0 6
-#define CLK_PLL_VIDEO0_2X 7
+
+/* The PLL_VIDEO0_2X clock is exported */
+
#define CLK_PLL_VE 8
#define CLK_PLL_DDR 9
@@ -35,7 +37,9 @@
#define CLK_PLL_PERIPH_2X 11
#define CLK_PLL_VIDEO1 12
-#define CLK_PLL_VIDEO1_2X 13
+
+/* The PLL_VIDEO1_2X clock is exported */
+
#define CLK_PLL_GPU 14
#define CLK_PLL_MIPI 15
#define CLK_PLL9 16