diff options
| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2020-02-11 19:59:30 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-02-12 19:00:58 +0100 |
| commit | 2b48dcb7a821fc38e0be3e171bd02e058196ccf1 (patch) | |
| tree | bf1f53532bf16d3cbf7b4545b240f893c6509238 /drivers/clk/sunxi-ng | |
| parent | clk: sunxi-ng: a64: Export MBUS clock (diff) | |
| download | linux-2b48dcb7a821fc38e0be3e171bd02e058196ccf1.tar.xz linux-2b48dcb7a821fc38e0be3e171bd02e058196ccf1.zip | |
clk: sunxi-ng: sun8i-de2: Split out H5 definitions
H5 has less clocks and resets than A64. Currently that's not obvious
because A64 is missing rotation core related clocks and reset.
Split out H5 definition. A64 structures will be fixed in subsequent
commit.
Note that this patch depends on commit 19368d99746e ("clk: sunxi-ng:
add support for Allwinner H3 DE2 CCU") for the H3 clock list.
Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'drivers/clk/sunxi-ng')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index d9668493c3f9..2478ae314d0f 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -192,6 +192,12 @@ static struct ccu_reset_map sun50i_a64_de2_resets[] = { [RST_WB] = { 0x08, BIT(2) }, }; +static struct ccu_reset_map sun50i_h5_de2_resets[] = { + [RST_MIXER0] = { 0x08, BIT(0) }, + [RST_MIXER1] = { 0x08, BIT(1) }, + [RST_WB] = { 0x08, BIT(2) }, +}; + static struct ccu_reset_map sun50i_h6_de3_resets[] = { [RST_MIXER0] = { 0x08, BIT(0) }, [RST_MIXER1] = { 0x08, BIT(1) }, @@ -229,6 +235,16 @@ static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = { .num_resets = ARRAY_SIZE(sun50i_a64_de2_resets), }; +static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { + .ccu_clks = sun8i_h3_de2_clks, + .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks), + + .hw_clks = &sun8i_h3_de2_hw_clks, + + .resets = sun50i_h5_de2_resets, + .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), +}; + static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = { .ccu_clks = sun50i_h6_de3_clks, .num_ccu_clks = ARRAY_SIZE(sun50i_h6_de3_clks), @@ -347,7 +363,7 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { }, { .compatible = "allwinner,sun50i-h5-de2-clk", - .data = &sun50i_a64_de2_clk_desc, + .data = &sun50i_h5_de2_clk_desc, }, { .compatible = "allwinner,sun50i-h6-de3-clk", |