diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2014-06-26 17:55:41 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-04 12:05:12 +0200 |
| commit | 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 (patch) | |
| tree | 283615dde84a477cae1909b831be8778867ad342 /drivers/clk/sunxi/clk-factors.c | |
| parent | clk: sunxi: move "ahb_sdram" to protected clock list (diff) | |
| download | linux-9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1.tar.xz linux-9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1.zip | |
clk: sunxi: Support factor clocks with N factor starting not from 0
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.
This patch adds an option to the factor clk driver's config data
structures to specify the base value of N.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi/clk-factors.c')
| -rw-r--r-- | drivers/clk/sunxi/clk-factors.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c index 3806d97e529b..2057c8ac648f 100644 --- a/drivers/clk/sunxi/clk-factors.c +++ b/drivers/clk/sunxi/clk-factors.c @@ -62,7 +62,7 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw, p = FACTOR_GET(config->pshift, config->pwidth, reg); /* Calculate the rate */ - rate = (parent_rate * n * (k + 1) >> p) / (m + 1); + rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1); return rate; } |