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authorChen-Yu Tsai <wens@csie.org>2016-10-18 07:42:09 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-10-19 11:56:31 +0200
commita17b9e4c9c5e9c4da4385908af0377af11529266 (patch)
tree9899ccf33bb9b62e91b5dda07ee1a6f79554940d /drivers/clk/sunxi/clk-sunxi.c
parentLinux 4.9-rc1 (diff)
downloadlinux-a17b9e4c9c5e9c4da4385908af0377af11529266.tar.xz
linux-a17b9e4c9c5e9c4da4385908af0377af11529266.zip
clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent
On the A31, the DMA engine only works if AHB1 is clocked from PLL6. In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked from the CPU clock, and cpufreq is working, we get an unstable timer. Force the AHB1 clock to use PLL6 as its parent. Previously this was done in the device tree with the assigned-clocks and assigned-clocks-parent bindings. However with this new monolithic driver, the system critical clocks aren't exported through the device tree. The alternative is to force this setting in the driver before the clocks are registered. This is also done in newer versions of mainline U-boot. But people still using an older version, or even the vendor version, can still hit this issue. Hence the need to do it in the kernel as well. Reported-by: Hans de Goede <hdegoede@redhat.com> Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com> Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi/clk-sunxi.c')
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