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authorStephen Boyd <sboyd@codeaurora.org>2016-05-03 01:53:02 +0200
committerStephen Boyd <sboyd@codeaurora.org>2016-05-03 01:53:02 +0200
commit5bc753249719e88c195e84bbf8eca6530507d403 (patch)
treec6f5e62bc0c9208de7691062007243e6c8eca568 /drivers/clk/sunxi
parentMerge tag 'v4.7-rockchip-clk3' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff)
parentclk: tegra: dfll: Reformat CVB frequency table (diff)
downloadlinux-5bc753249719e88c195e84bbf8eca6530507d403.tar.xz
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Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
Pull tegra clk driver changes from Thierry Reding: This set of changes contains a bunch of cleanups and minor fixes along with some new clocks, mainly on Tegra210, in preparation for supporting DisplayPort and HDMI 2.0. * tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: clk: tegra: dfll: Reformat CVB frequency table clk: tegra: dfll: Properly clean up on failure and removal clk: tegra: dfll: Make code more comprehensible clk: tegra: dfll: Reference CVB table instead of copying data clk: tegra: dfll: Update kerneldoc clk: tegra: Fix PLL_U post divider and initial rate on Tegra30 clk: tegra: Initialize PLL_C to sane rate on Tegra30 clk: tegra: Fix pllre Tegra210 and add pll_re_out1 clk: tegra: Add sor_safe clock clk: tegra: dpaux and dpaux1 are fixed factor clocks clk: tegra: Add dpaux1 clock clk: tegra: Use correct parent for dpaux clock clk: tegra: Add fixed factor peripheral clock type clk: tegra: Special-case mipi-cal parent on Tegra114 clk: tegra: Remove trailing blank line clk: tegra: Constify peripheral clock registers clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
Diffstat (limited to 'drivers/clk/sunxi')
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