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| author | Jon Hunter <jonathanh@nvidia.com> | 2016-01-28 17:33:50 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-02-02 15:49:29 +0100 |
| commit | 29569941688cdf647f953b2eb073aa6ec9dd3fc1 (patch) | |
| tree | 0131162bdb53e122a403155d00dd72034132a5db /drivers/clk/tegra/clk-tegra-periph.c | |
| parent | clk: tegra: Add missing of_node_put() (diff) | |
| download | linux-29569941688cdf647f953b2eb073aa6ec9dd3fc1.tar.xz linux-29569941688cdf647f953b2eb073aa6ec9dd3fc1.zip | |
clk: tegra: Add the APB2APE audio clock on Tegra210
The APB2APE clock for the audio subsystem is required for powering up the
audio power domain and accessing the various modules in this subsystem on
Tegra210 devices. Add this clock for Tegra210.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra-periph.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra-periph.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c index 1860df1862dd..ea2b9cbf9e70 100644 --- a/drivers/clk/tegra/clk-tegra-periph.c +++ b/drivers/clk/tegra/clk-tegra-periph.c @@ -829,6 +829,7 @@ static struct tegra_periph_init_data gate_clks[] = { GATE("xusb_gate", "osc", 143, 0, tegra_clk_xusb_gate, 0), GATE("pll_p_out_cpu", "pll_p", 223, 0, tegra_clk_pll_p_out_cpu, 0), GATE("pll_p_out_adsp", "pll_p", 187, 0, tegra_clk_pll_p_out_adsp, 0), + GATE("apb2ape", "clk_m", 107, 0, tegra_clk_apb2ape, 0), }; static struct tegra_periph_init_data div_clks[] = { |