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authorStephen Boyd <sboyd@codeaurora.org>2015-08-26 00:55:28 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-08-26 00:55:28 +0200
commita7c602bf42f943e717eed92165ebfa6dbaba3029 (patch)
tree3c32bc1572acb102ba86c53005ca83cf0c632fd1 /drivers/clk/tegra/clk-tegra-super-gen4.c
parentclk: qcom: Fix MSM8916 prng clock enable bit (diff)
parentclk: tegra: Add the DFLL as a possible parent of the cclk_g clock (diff)
downloadlinux-a7c602bf42f943e717eed92165ebfa6dbaba3029.tar.xz
linux-a7c602bf42f943e717eed92165ebfa6dbaba3029.zip
Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.3-rc1 This contains the DFLL driver needed to implement CPU frequency scaling on Tegra.
Diffstat (limited to 'drivers/clk/tegra/clk-tegra-super-gen4.c')
-rw-r--r--drivers/clk/tegra/clk-tegra-super-gen4.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c
index ecd7ff736b74..5b1d723932c5 100644
--- a/drivers/clk/tegra/clk-tegra-super-gen4.c
+++ b/drivers/clk/tegra/clk-tegra-super-gen4.c
@@ -43,7 +43,9 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4",
static const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
"pll_p", "pll_p_out4", "unused",
- "unused", "pll_x" };
+ "unused", "pll_x", "unused", "unused",
+ "unused", "unused", "unused", "unused",
+ "dfllCPU_out" };
static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m",
"pll_p", "pll_p_out4", "unused",