diff options
| author | Danny Huang <dahuang@nvidia.com> | 2015-06-18 23:28:27 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-11-20 18:07:35 +0100 |
| commit | 267b62a969511236e91121cd27f4cc1558385855 (patch) | |
| tree | 4b8bb88a584c67966c3b94ecae9ed4c26f3f4c28 /drivers/clk/tegra/clk-tegra114.c | |
| parent | clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate (diff) | |
| download | linux-267b62a969511236e91121cd27f4cc1558385855.tar.xz linux-267b62a969511236e91121cd27f4cc1558385855.zip | |
clk: tegra: pll: Update PLLM handling
PLLM is fixed for Tegra30 up through Tegra114. Starting with Tegra124
PLLM can change rate. Mark PLLM as TEGRA_PLL_FIXED for the generations
where it should be. Modify the check in clk_pll_round_rate() and
clk_pll_recalc_rate() to allow for the non-fixed version to return the
correct rate.
Note that there is no change for Tegra20. This is because PLLM is not
distinguished in that driver, and adding either the PLLM or FIXED_RATE
flags will cause potential problems.
PLLM never supported dynamic ramping. On Tegra20 and Tegra30, there is
no dynamic ramping at all, and on Tegra114, Tegra124 and Tegra132, only
PLLX and PLLC support dynamic ramping, so we can go ahead and remove the
specialized pllm_ops.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra114.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra114.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index 9411a1577d85..4a24aa4bbdea 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -351,7 +351,8 @@ static struct tegra_clk_pll_params pll_m_params = { .pmc_divnm_reg = PMC_PLLM_WB0_OVERRIDE, .pmc_divp_reg = PMC_PLLM_WB0_OVERRIDE_2, .freq_table = pll_m_freq_table, - .flags = TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE, + .flags = TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE | + TEGRA_PLL_FIXED, }; static struct div_nmp pllp_nmp = { |