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| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2017-02-28 15:37:22 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-03-20 14:07:48 +0100 |
| commit | 24c3ebef1ab6d5620eaaa51f69223118cac97db6 (patch) | |
| tree | cbeb8fe67d558a7e2986caee5089c4691e6d65af /drivers/clk/tegra/clk-tegra30.c | |
| parent | clk: tegra: Add super clock mux/divider (diff) | |
| download | linux-24c3ebef1ab6d5620eaaa51f69223118cac97db6.tar.xz linux-24c3ebef1ab6d5620eaaa51f69223118cac97db6.zip | |
clk: tegra: Add aclk
This clock clocks the ADSP Cortex-A9.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra30.c')
0 files changed, 0 insertions, 0 deletions