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authorPeter De Schrijver <pdeschrijver@nvidia.com>2013-04-03 16:40:44 +0200
committerStephen Warren <swarren@nvidia.com>2013-04-05 00:10:59 +0200
commitfdcccbd804088eb96881c9f6532de04868f9dbc1 (patch)
treecdec0c69139e1a8a4f6577c8bc3c91e7ebcbf22e /drivers/clk/tegra/clk.h
parentclk: tegra: Add flags to tegra_clk_periph() (diff)
downloadlinux-fdcccbd804088eb96881c9f6532de04868f9dbc1.tar.xz
linux-fdcccbd804088eb96881c9f6532de04868f9dbc1.zip
clk: tegra: Workaround for Tegra114 MSENC problem
Workaround a hardware bug in MSENC during clock enable. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.h')
-rw-r--r--drivers/clk/tegra/clk.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index fd12b77c985d..fb48f0467b9d 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -358,6 +358,7 @@ struct tegra_clk_periph_regs {
* TEGRA_PERIPH_ON_APB - If peripheral is in the APB bus then read the
* bus to flush the write operation in apb bus. This flag indicates
* that this peripheral is in apb bus.
+ * TEGRA_PERIPH_WAR_1005168 - Apply workaround for Tegra114 MSENC bug
*/
struct tegra_clk_periph_gate {
u32 magic;
@@ -377,6 +378,7 @@ struct tegra_clk_periph_gate {
#define TEGRA_PERIPH_NO_RESET BIT(0)
#define TEGRA_PERIPH_MANUAL_RESET BIT(1)
#define TEGRA_PERIPH_ON_APB BIT(2)
+#define TEGRA_PERIPH_WAR_1005168 BIT(3)
void tegra_periph_reset(struct tegra_clk_periph_gate *gate, bool assert);
extern const struct clk_ops tegra_clk_periph_gate_ops;