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author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-09-11 16:57:37 +0200 |
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committer | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-11-26 17:46:52 +0100 |
commit | 2b239077d1e2061c65763dcf57ab978ae5261559 (patch) | |
tree | e715f0da99334208a23cdfa9974ed5e3a2754bc8 /drivers/clk/tegra/clk.h | |
parent | clk: tegra: Add support for PLLSS (diff) | |
download | linux-2b239077d1e2061c65763dcf57ab978ae5261559.tar.xz linux-2b239077d1e2061c65763dcf57ab978ae5261559.zip |
clk: tegra: Add periph regs bank X
Tegra124 has an extra bank of peripheral clock registers. Add it to the
generic peripheral clock code.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk.h')
0 files changed, 0 insertions, 0 deletions