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author | Tuomas Tynkkynen <ttynkkynen@nvidia.com> | 2014-05-16 15:50:20 +0200 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-05-17 00:49:23 +0200 |
commit | d2c834abe2b39a2d5a6c38ef44de87c97cbb34b4 (patch) | |
tree | 0b481e0a303d60d3f79d8bf0333b1168b4a24b6d /drivers/clk/tegra | |
parent | clk: shmobile: clk-mstp: change to using clock-indices (diff) | |
download | linux-d2c834abe2b39a2d5a6c38ef44de87c97cbb34b4.tar.xz linux-d2c834abe2b39a2d5a6c38ef44de87c97cbb34b4.zip |
clk: tegra: Fix wrong value written to PLLE_AUX
The value written to PLLE_AUX was incorrect due to a wrong variable
being used. Without this fix SATA does not work.
Cc: stable@vger.kernel.org
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved changelog]
Diffstat (limited to 'drivers/clk/tegra')
-rw-r--r-- | drivers/clk/tegra/clk-pll.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 0d20241e0770..e1769addf435 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -1718,7 +1718,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name, "pll_re_vco"); } else { val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL); - pll_writel(val, pll_params->aux_reg, pll); + pll_writel(val_aux, pll_params->aux_reg, pll); } clk = _tegra_clk_register_pll(pll, name, parent_name, flags, |