diff options
| author | Tero Kristo <t-kristo@ti.com> | 2016-02-20 12:24:26 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-02-22 23:16:49 +0100 |
| commit | b6f5128459a40410f9afefddc0ad688ea5b22c28 (patch) | |
| tree | dfd2a78beabd091b5c49d8aa045497061c1d1855 /drivers/clk/ti/dpll44xx.c | |
| parent | Merge branch 'clk-fixes' into clk-next (diff) | |
| download | linux-b6f5128459a40410f9afefddc0ad688ea5b22c28.tar.xz linux-b6f5128459a40410f9afefddc0ad688ea5b22c28.zip | |
clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs
Convert DPLL support code to use clk_hw pointers for reference and bypass
clocks. This allows us to use clk_hw_* APIs for accessing any required
parameters for these clocks, avoiding some locking problems at least with
DPLL enable code; this used clk_get_rate which uses mutex but isn't
good under clk_enable / clk_disable.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/ti/dpll44xx.c')
| -rw-r--r-- | drivers/clk/ti/dpll44xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/ti/dpll44xx.c b/drivers/clk/ti/dpll44xx.c index 660d7436ac24..82c05b55a7be 100644 --- a/drivers/clk/ti/dpll44xx.c +++ b/drivers/clk/ti/dpll44xx.c @@ -94,7 +94,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd) { long fint, fout; - fint = clk_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1); + fint = clk_hw_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1); fout = fint * dd->last_rounded_m; if ((fint < OMAP4_DPLL_LP_FINT_MAX) && (fout < OMAP4_DPLL_LP_FOUT_MAX)) @@ -212,13 +212,13 @@ int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, if (!dd) return -EINVAL; - if (clk_get_rate(dd->clk_bypass) == req->rate && + if (clk_hw_get_rate(dd->clk_bypass) == req->rate && (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) { - req->best_parent_hw = __clk_get_hw(dd->clk_bypass); + req->best_parent_hw = dd->clk_bypass; } else { req->rate = omap4_dpll_regm4xen_round_rate(hw, req->rate, &req->best_parent_rate); - req->best_parent_hw = __clk_get_hw(dd->clk_ref); + req->best_parent_hw = dd->clk_ref; } req->best_parent_rate = req->rate; |