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authorUlf Hansson <ulf.hansson@linaro.org>2012-10-10 13:42:27 +0200
committerMike Turquette <mturquette@ti.com>2012-11-10 01:47:06 +0100
commita816d250e866b01bd18b0dd2bcbe5f1951310094 (patch)
treecbb6ebfcdea25ed695a6f78064e80136858c8e6b /drivers/clk/ux500/clk.h
parentmfd: db8500: Connect ARMSS clk to ARM OPP (diff)
downloadlinux-a816d250e866b01bd18b0dd2bcbe5f1951310094.tar.xz
linux-a816d250e866b01bd18b0dd2bcbe5f1951310094.zip
clk: ux500: Support for prcmu_scalable_rate clock
The prcmu_scalable_rate clock can change rate but is not gateable. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/ux500/clk.h')
-rw-r--r--drivers/clk/ux500/clk.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index f36eeedca493..c3e449169a83 100644
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h
@@ -35,6 +35,12 @@ struct clk *clk_reg_prcmu_gate(const char *name,
u8 cg_sel,
unsigned long flags);
+struct clk *clk_reg_prcmu_scalable_rate(const char *name,
+ const char *parent_name,
+ u8 cg_sel,
+ unsigned long rate,
+ unsigned long flags);
+
struct clk *clk_reg_prcmu_rate(const char *name,
const char *parent_name,
u8 cg_sel,