diff options
author | Lee Jones <lee.jones@linaro.org> | 2013-09-17 11:34:24 +0200 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-09-26 11:05:53 +0200 |
commit | d625a730675decc49f25f761d0e2e20e45e0ff46 (patch) | |
tree | 8b91c81678419b22985d0b8f05d49ebe2f395cb3 /drivers/clk/ux500 | |
parent | clk: ux500: Add Device Tree support for the PRCC Kernel clock (diff) | |
download | linux-d625a730675decc49f25f761d0e2e20e45e0ff46.tar.xz linux-d625a730675decc49f25f761d0e2e20e45e0ff46.zip |
clk: ux500: Add Device Tree support for the RTC clock
This patch enables the RTC fixed frequency clock to be specified from
Device Tree via phandles to the "rtc32k-clock" node.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/clk/ux500')
-rw-r--r-- | drivers/clk/ux500/u8500_of_clk.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c index 4fcafd007656..fc647cf1dd97 100644 --- a/drivers/clk/ux500/u8500_of_clk.c +++ b/drivers/clk/ux500/u8500_of_clk.c @@ -60,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, struct device_node *np = NULL; struct device_node *child = NULL; const char *sgaclk_parent = NULL; - struct clk *clk; + struct clk *clk, *rtc_clk; if (of_have_populated_dt()) np = of_find_matching_node(NULL, u8500_clk_of_match); @@ -84,7 +84,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, /* FIXME: Add sys, ulp and int clocks here. */ - clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL", + rtc_clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL", CLK_IS_ROOT|CLK_IGNORE_UNUSED, 32768); @@ -548,5 +548,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, if (!of_node_cmp(child->name, "prcc-kernel-clock")) of_clk_add_provider(child, ux500_twocell_get, prcc_kclk); + + if (!of_node_cmp(child->name, "rtc32k-clock")) + of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk); } } |