diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2015-02-27 04:34:35 +0100 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-03-27 06:43:30 +0100 |
commit | b3261d768bcdd4b368179ed85becf38c95461848 (patch) | |
tree | 844605b17aeb10ce550bb5682413abc3c25c2298 /drivers/clk | |
parent | Merge tag 'sunxi-clocks-for-4.1' of https://git.kernel.org/pub/scm/linux/kern... (diff) | |
download | linux-b3261d768bcdd4b368179ed85becf38c95461848.tar.xz linux-b3261d768bcdd4b368179ed85becf38c95461848.zip |
clk: qcom: Fix ipq806x LCC frequency tables
These frequency tables list the wrong rates. Either they don't
have the correct frequency at all, or they're specified in kHz
instead of Hz. Fix it.
Fixes: c99e515a92e9 "clk: qcom: Add IPQ806X LPASS clock controller (LCC) driver"
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/qcom/lcc-ipq806x.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index e4ac699666d5..47f0ac16d149 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -296,14 +296,14 @@ static struct clk_regmap_mux pcm_clk = { }; static struct freq_tbl clk_tbl_aif_osr[] = { - { 22050, P_PLL4, 1, 147, 20480 }, - { 32000, P_PLL4, 1, 1, 96 }, - { 44100, P_PLL4, 1, 147, 10240 }, - { 48000, P_PLL4, 1, 1, 64 }, - { 88200, P_PLL4, 1, 147, 5120 }, - { 96000, P_PLL4, 1, 1, 32 }, - { 176400, P_PLL4, 1, 147, 2560 }, - { 192000, P_PLL4, 1, 1, 16 }, + { 2822400, P_PLL4, 1, 147, 20480 }, + { 4096000, P_PLL4, 1, 1, 96 }, + { 5644800, P_PLL4, 1, 147, 10240 }, + { 6144000, P_PLL4, 1, 1, 64 }, + { 11289600, P_PLL4, 1, 147, 5120 }, + { 12288000, P_PLL4, 1, 1, 32 }, + { 22579200, P_PLL4, 1, 147, 2560 }, + { 24576000, P_PLL4, 1, 1, 16 }, { }, }; @@ -362,7 +362,7 @@ static struct clk_branch spdif_clk = { }; static struct freq_tbl clk_tbl_ahbix[] = { - { 131072, P_PLL4, 1, 1, 3 }, + { 131072000, P_PLL4, 1, 1, 3 }, { }, }; |