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author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2017-04-18 04:18:19 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-19 19:18:52 +0200 |
commit | d127967a7b18598b8922bf9a4b984fae899787dc (patch) | |
tree | 019cd10427ab72fd1968d6032648766a9a50af92 /drivers/clk | |
parent | clk: qcom: add parent for venus core0 and core1 gdsc's (diff) | |
download | linux-d127967a7b18598b8922bf9a4b984fae899787dc.tar.xz linux-d127967a7b18598b8922bf9a4b984fae899787dc.zip |
clk: cs2000: enable clock skipping mode
CLK_IN skipping mode allows the PLL to maintain lock even when the
CLK_IN signal has missing pulses for up to 20 ms (t CS) at a time.
This patch enables it
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/clk-cs2000-cp.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c index 4df38c5ff96c..a8fa6bdd0e55 100644 --- a/drivers/clk/clk-cs2000-cp.c +++ b/drivers/clk/clk-cs2000-cp.c @@ -54,6 +54,7 @@ #define ENDEV2 (0x1) /* FUNC_CFG1 */ +#define CLKSKIPEN (1 << 7) #define REFCLKDIV(x) (((x) & 0x3) << 3) #define REFCLKDIV_MASK REFCLKDIV(0x3) @@ -122,6 +123,11 @@ static int cs2000_enable_dev_config(struct cs2000_priv *priv, bool enable) if (ret < 0) return ret; + ret = cs2000_bset(priv, FUNC_CFG1, CLKSKIPEN, + enable ? CLKSKIPEN : 0); + if (ret < 0) + return ret; + return 0; } |