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authorVictoria Milhoan <vicki.milhoan@freescale.com>2015-08-05 20:28:43 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2015-08-10 17:19:02 +0200
commitdd503f66098e37dd0090897c099fa6ca343db84d (patch)
tree072458819056dea8508246ac15966076057b5a19 /drivers/clk
parentcrypto: caam - Added clocks and clock-names properties to SEC4.0 device tree ... (diff)
downloadlinux-dd503f66098e37dd0090897c099fa6ca343db84d.tar.xz
linux-dd503f66098e37dd0090897c099fa6ca343db84d.zip
ARM: clk-imx6q: Add CAAM clock support
Add CAAM clock support to the i.MX6 clocking infrastructure. Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Tested-by: Horia Geantă <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/imx/clk-imx6q.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index d046f8e43de8..15e855745216 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -381,6 +381,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk[IMX6QDL_CLK_ASRC] = imx_clk_gate2_shared("asrc", "asrc_podf", base + 0x68, 6, &share_count_asrc);
clk[IMX6QDL_CLK_ASRC_IPG] = imx_clk_gate2_shared("asrc_ipg", "ahb", base + 0x68, 6, &share_count_asrc);
clk[IMX6QDL_CLK_ASRC_MEM] = imx_clk_gate2_shared("asrc_mem", "ahb", base + 0x68, 6, &share_count_asrc);
+ clk[IMX6QDL_CLK_CAAM_MEM] = imx_clk_gate2("caam_mem", "ahb", base + 0x68, 8);
+ clk[IMX6QDL_CLK_CAAM_ACLK] = imx_clk_gate2("caam_aclk", "ahb", base + 0x68, 10);
+ clk[IMX6QDL_CLK_CAAM_IPG] = imx_clk_gate2("caam_ipg", "ipg", base + 0x68, 12);
clk[IMX6QDL_CLK_CAN1_IPG] = imx_clk_gate2("can1_ipg", "ipg", base + 0x68, 14);
clk[IMX6QDL_CLK_CAN1_SERIAL] = imx_clk_gate2("can1_serial", "can_root", base + 0x68, 16);
clk[IMX6QDL_CLK_CAN2_IPG] = imx_clk_gate2("can2_ipg", "ipg", base + 0x68, 18);