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authorJisheng Zhang <jszhang@marvell.com>2014-12-31 09:57:52 +0100
committerMichael Turquette <mturquette@linaro.org>2015-01-13 19:58:43 +0100
commitb71e8ecd57c8aae5b1815782c47b74ffe3efc09a (patch)
tree3d214ac818869669f691010bf3a2d3ab05518e2e /drivers/clk
parentclk: at91: keep slow clk enabled to prevent system hang (diff)
downloadlinux-b71e8ecd57c8aae5b1815782c47b74ffe3efc09a.tar.xz
linux-b71e8ecd57c8aae5b1815782c47b74ffe3efc09a.zip
clk: berlin: bg2q: remove non-exist "smemc" gate clock
The "smemc" clock is removed on BG2Q SoCs. In fact, bit19 of clkenable register is for nfc. Current code use bit19 for non-exist "smemc" incorrectly, this prevents eMMC from working due to the sdhci's "core" clk is still gated. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Cc: stable@vger.kernel.org # 3.16+ Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/berlin/bg2q.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c
index 21784e4eb3f0..440ef81ab15c 100644
--- a/drivers/clk/berlin/bg2q.c
+++ b/drivers/clk/berlin/bg2q.c
@@ -285,7 +285,6 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = {
{ "pbridge", "perif", 15, CLK_IGNORE_UNUSED },
{ "sdio", "perif", 16, CLK_IGNORE_UNUSED },
{ "nfc", "perif", 18 },
- { "smemc", "perif", 19 },
{ "pcie", "perif", 22 },
};