diff options
author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2013-02-07 17:30:36 +0100 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-02-12 18:29:13 +0100 |
commit | b4c154a339b7efe48f2801d7fb10199c57dddafd (patch) | |
tree | 9c0309152272b0942644c756da6522d8c81a3f59 /drivers/clk | |
parent | clk: tegra: Add missing spinlock for hclk and pclk (diff) | |
download | linux-b4c154a339b7efe48f2801d7fb10199c57dddafd.tar.xz linux-b4c154a339b7efe48f2801d7fb10199c57dddafd.zip |
clk: tegra: local arrays should be static
cclk_g_parents, cclk_lp_parents and sclk_parents are only accessed from within
clk-tegra30.c. Declare them static to avoid namespace polution.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/tegra/clk-tegra30.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 8a4fec443c00..bf050bc5ac28 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1250,16 +1250,16 @@ static void __init tegra30_pmc_clk_init(void) } -const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m", - "pll_p_cclkg", "pll_p_out4_cclkg", - "pll_p_out3_cclkg", "unused", "pll_x" }; -const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m", - "pll_p_cclklp", "pll_p_out4_cclklp", - "pll_p_out3_cclklp", "unused", "pll_x", - "pll_x_out0" }; -const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4", - "pll_p_out3", "pll_p_out2", "unused", - "clk_32k", "pll_m_out1" }; +static const char *cclk_g_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m", + "pll_p_cclkg", "pll_p_out4_cclkg", + "pll_p_out3_cclkg", "unused", "pll_x" }; +static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m", + "pll_p_cclklp", "pll_p_out4_cclklp", + "pll_p_out3_cclklp", "unused", "pll_x", + "pll_x_out0" }; +static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4", + "pll_p_out3", "pll_p_out2", "unused", + "clk_32k", "pll_m_out1" }; static void __init tegra30_super_clk_init(void) { |