summaryrefslogtreecommitdiffstats
path: root/drivers/clk
diff options
context:
space:
mode:
authorTony Lindgren <tony@atomide.com>2019-12-12 18:46:10 +0100
committerTony Lindgren <tony@atomide.com>2020-01-23 17:20:17 +0100
commitcfcbc2dbb70826b91aa45ae37168b2db2aac1803 (patch)
tree79c8cc1a4a4c554684a5431839a6001ed0016ac8 /drivers/clk
parentclk: ti: clkctrl: Fix hidden dependency to node name (diff)
downloadlinux-cfcbc2dbb70826b91aa45ae37168b2db2aac1803.tar.xz
linux-cfcbc2dbb70826b91aa45ae37168b2db2aac1803.zip
ARM: dts: Add missing omap4 secure clocks
The secure clocks on omap4 are similar to what we already have for dra7 in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table 3-1346 L4PER_CM2 Registers Mapping Summary". The secure clocks are part of the l4_per clock manager. As the l4_per clock manager has now two clock domains as children, let's also update the l4_per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/ti/clk-44xx.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 2b4dab632318..312a20f8ec0e 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -604,6 +604,18 @@ static const struct omap_clkctrl_reg_data omap4_l4_per_clkctrl_regs[] __initcons
{ 0 },
};
+static const struct
+omap_clkctrl_reg_data omap4_l4_secure_clkctrl_regs[] __initconst = {
+ { OMAP4_AES1_CLKCTRL, NULL, CLKF_SW_SUP, "" },
+ { OMAP4_AES2_CLKCTRL, NULL, CLKF_SW_SUP, "" },
+ { OMAP4_DES3DES_CLKCTRL, NULL, CLKF_SW_SUP, "" },
+ { OMAP4_PKA_CLKCTRL, NULL, CLKF_SW_SUP, "" },
+ { OMAP4_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" },
+ { OMAP4_SHA2MD5_CLKCTRL, NULL, CLKF_SW_SUP, "" },
+ { OMAP4_CRYPTODMA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" },
+ { 0 },
+};
+
static const struct omap_clkctrl_bit_data omap4_gpio1_bit_data[] __initconst = {
{ 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
{ 0 },
@@ -691,6 +703,7 @@ const struct omap_clkctrl_data omap4_clkctrl_data[] __initconst = {
{ 0x4a009220, omap4_l3_gfx_clkctrl_regs },
{ 0x4a009320, omap4_l3_init_clkctrl_regs },
{ 0x4a009420, omap4_l4_per_clkctrl_regs },
+ { 0x4a0095a0, omap4_l4_secure_clkctrl_regs },
{ 0x4a307820, omap4_l4_wkup_clkctrl_regs },
{ 0x4a307a20, omap4_emu_sys_clkctrl_regs },
{ 0 },