diff options
| author | Stefan Wahren <wahrenst@gmx.net> | 2019-08-18 18:23:43 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2019-09-17 18:55:31 +0200 |
| commit | 42de9ad400afadd41ee027b5feef234a2d2918b9 (patch) | |
| tree | d69e8e66201abf614ec1ef4d1bd522d27c8fa574 /drivers/clk | |
| parent | clk: bcm2835: Introduce SoC specific clock registration (diff) | |
| download | linux-42de9ad400afadd41ee027b5feef234a2d2918b9.tar.xz linux-42de9ad400afadd41ee027b5feef234a2d2918b9.zip | |
clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
The new BCM2711 supports an additional clock for the emmc2 block.
So add a new compatible and register this clock only for BCM2711.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/bcm/clk-bcm2835.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 21cd952c42e0..fdf672a7219e 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -114,6 +114,8 @@ #define CM_AVEODIV 0x1bc #define CM_EMMCCTL 0x1c0 #define CM_EMMCDIV 0x1c4 +#define CM_EMMC2CTL 0x1d0 +#define CM_EMMC2DIV 0x1d4 /* General bits for the CM_*CTL regs */ # define CM_ENABLE BIT(4) @@ -290,7 +292,8 @@ #define BCM2835_MAX_FB_RATE 1750000000u #define SOC_BCM2835 BIT(0) -#define SOC_ALL (SOC_BCM2835) +#define SOC_BCM2711 BIT(1) +#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711) /* * Names of clocks used within the driver that need to be replaced @@ -2003,6 +2006,16 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .frac_bits = 8, .tcnt_mux = 39), + /* EMMC2 clock (only available for BCM2711) */ + [BCM2711_CLOCK_EMMC2] = REGISTER_PER_CLK( + SOC_BCM2711, + .name = "emmc2", + .ctl_reg = CM_EMMC2CTL, + .div_reg = CM_EMMC2DIV, + .int_bits = 4, + .frac_bits = 8, + .tcnt_mux = 42), + /* General purpose (GPIO) clocks */ [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK( SOC_ALL, @@ -2238,8 +2251,13 @@ static const struct cprman_plat_data cprman_bcm2835_plat_data = { .soc = SOC_BCM2835, }; +static const struct cprman_plat_data cprman_bcm2711_plat_data = { + .soc = SOC_BCM2711, +}; + static const struct of_device_id bcm2835_clk_of_match[] = { { .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data }, + { .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data }, {} }; MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match); |