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authorAnson Huang <Anson.Huang@nxp.com>2019-08-18 08:32:24 +0200
committerShawn Guo <shawnguo@kernel.org>2019-08-19 15:38:55 +0200
commit613cc5cd745c77da2b9090bcb29f82c05b853567 (patch)
treed67dd0ca9dddfdaa0c772dea84f8198f3300af69 /drivers/clk
parentclk: imx8mn: Add missing rate_count assignment for each PLL structure (diff)
downloadlinux-613cc5cd745c77da2b9090bcb29f82c05b853567.tar.xz
linux-613cc5cd745c77da2b9090bcb29f82c05b853567.zip
clk: imx8mn: Add necessary frequency support for ARM PLL table
i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing frequency for ARM PLL table. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/imx/clk-imx8mn.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index f09693112ee2..f41116d59749 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -42,6 +42,8 @@ enum {
static const struct imx_pll14xx_rate_table imx8mn_pll1416x_tbl[] = {
PLL_1416X_RATE(1800000000U, 225, 3, 0),
PLL_1416X_RATE(1600000000U, 200, 3, 0),
+ PLL_1416X_RATE(1500000000U, 375, 3, 1),
+ PLL_1416X_RATE(1400000000U, 350, 3, 1),
PLL_1416X_RATE(1200000000U, 300, 3, 1),
PLL_1416X_RATE(1000000000U, 250, 3, 1),
PLL_1416X_RATE(800000000U, 200, 3, 1),