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authorJeffrey Hugo <jhugo@codeaurora.org>2018-12-13 18:09:09 +0100
committerStephen Boyd <sboyd@kernel.org>2018-12-14 22:41:05 +0100
commit0f1c6ca83fb483a5ea85fe239588a90bb29d519d (patch)
treefdcf0f95c449d2847fe04cb973ae774455047445 /drivers/clk
parentclk: qcom: Leave mmss noc on for 8998 (diff)
downloadlinux-0f1c6ca83fb483a5ea85fe239588a90bb29d519d.tar.xz
linux-0f1c6ca83fb483a5ea85fe239588a90bb29d519d.zip
clk: qcom: Drop unused 8998 clock
gcc_lpass_trig_clk is not used downstream, therefore there is no reason to expect it to be needed for clients. Let's remove it because messing with the clock has been observed to cause Linux hangs when the qdss_clk is initialized by rpmcc. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Fixes: 4807c71cc688 (arm64: dts: Add msm8998 SoC and MTP board support) Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/gcc-msm8998.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
index b0c4b3874120..1b779396e04f 100644
--- a/drivers/clk/qcom/gcc-msm8998.c
+++ b/drivers/clk/qcom/gcc-msm8998.c
@@ -2005,19 +2005,6 @@ static struct clk_branch gcc_hmss_trig_clk = {
},
};
-static struct clk_branch gcc_lpass_trig_clk = {
- .halt_reg = 0x4701c,
- .halt_check = BRANCH_HALT,
- .clkr = {
- .enable_reg = 0x4701c,
- .enable_mask = BIT(0),
- .hw.init = &(struct clk_init_data){
- .name = "gcc_lpass_trig_clk",
- .ops = &clk_branch2_ops,
- },
- },
-};
-
static struct clk_branch gcc_mmss_noc_cfg_ahb_clk = {
.halt_reg = 0x9004,
.halt_check = BRANCH_HALT,
@@ -2716,7 +2703,6 @@ static struct clk_regmap *gcc_msm8998_clocks[] = {
[GCC_HMSS_AT_CLK] = &gcc_hmss_at_clk.clkr,
[GCC_HMSS_RBCPR_CLK] = &gcc_hmss_rbcpr_clk.clkr,
[GCC_HMSS_TRIG_CLK] = &gcc_hmss_trig_clk.clkr,
- [GCC_LPASS_TRIG_CLK] = &gcc_lpass_trig_clk.clkr,
[GCC_MMSS_NOC_CFG_AHB_CLK] = &gcc_mmss_noc_cfg_ahb_clk.clkr,
[GCC_MMSS_QM_AHB_CLK] = &gcc_mmss_qm_ahb_clk.clkr,
[GCC_MMSS_QM_CORE_CLK] = &gcc_mmss_qm_core_clk.clkr,