diff options
| author | Adriana Reus <adriana.reus@nxp.com> | 2017-10-02 12:32:10 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-11-02 08:26:14 +0100 |
| commit | edc5a8e754aba9c6eaeddd18cb1e72462f99b16c (patch) | |
| tree | 3f0789d3c0a99dd4b31f0321087ea168595898d9 /drivers/clk | |
| parent | clk: imx: clk-imx6ul: allow lcdif_pre_sel to change parent rate (diff) | |
| download | linux-edc5a8e754aba9c6eaeddd18cb1e72462f99b16c.tar.xz linux-edc5a8e754aba9c6eaeddd18cb1e72462f99b16c.zip | |
clk: imx: imx7d: Fix parent clock for OCRAM_CLK
The parent of OCRAM_CLK should be axi_main_root_clk
and not axi_post_div.
before:
axi_src 1 1 332307692 0 0
axi_cg 1 1 332307692 0 0
axi_pre_div 1 1 332307692 0 0
axi_post_div 1 1 332307692 0 0
ocram_clk 0 0 332307692 0 0
main_axi_root_clk 1 1 332307692 0 0
after:
axi_src 1 1 332307692 0 0
axi_cg 1 1 332307692 0 0
axi_pre_div 1 1 332307692 0 0
axi_post_div 1 1 332307692 0 0
main_axi_root_clk 1 1 332307692 0 0
ocram_clk 0 0 332307692 0 0
Reference Doc: i.MX 7D Reference Manual - Chap 5, p 516
(https://www.nxp.com/docs/en/reference-manual/IMX7DRM.pdf)
Fixes: 8f6d8094b215 ("ARM: imx: add imx7d clk tree support")
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-imx7d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 2305699db467..0ac9b30c8b90 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -797,7 +797,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clks[IMX7D_MAIN_AXI_ROOT_CLK] = imx_clk_gate4("main_axi_root_clk", "axi_post_div", base + 0x4040, 0); clks[IMX7D_DISP_AXI_ROOT_CLK] = imx_clk_gate4("disp_axi_root_clk", "disp_axi_post_div", base + 0x4050, 0); clks[IMX7D_ENET_AXI_ROOT_CLK] = imx_clk_gate4("enet_axi_root_clk", "enet_axi_post_div", base + 0x4060, 0); - clks[IMX7D_OCRAM_CLK] = imx_clk_gate4("ocram_clk", "axi_post_div", base + 0x4110, 0); + clks[IMX7D_OCRAM_CLK] = imx_clk_gate4("ocram_clk", "main_axi_root_clk", base + 0x4110, 0); clks[IMX7D_OCRAM_S_CLK] = imx_clk_gate4("ocram_s_clk", "ahb_root_clk", base + 0x4120, 0); clks[IMX7D_DRAM_ROOT_CLK] = imx_clk_gate4("dram_root_clk", "dram_post_div", base + 0x4130, 0); clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0); |