diff options
author | Nikita Travkin <nikita@trvn.ru> | 2022-06-12 16:59:52 +0200 |
---|---|---|
committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-07-01 05:34:13 +0200 |
commit | bdafb609c3bb848d710ad9cd4debd2ee9d6a4049 (patch) | |
tree | f4328ac656cf52d92e74b3fbda96e85fd7175e58 /drivers/clk | |
parent | clk: qcom: camcc-sm8250: Fix topology around titan_top power domain (diff) | |
download | linux-bdafb609c3bb848d710ad9cd4debd2ee9d6a4049.tar.xz linux-bdafb609c3bb848d710ad9cd4debd2ee9d6a4049.zip |
clk: qcom: clk-rcg2: Fail Duty-Cycle configuration if MND divider is not enabled.
In cases when MND is not enabled (e.g. when only Half Integer Divider is
used), setting D registers makes no effect.
Fail instead of making ineffective write.
Fixes: 7f891faf596e ("clk: qcom: clk-rcg2: Add support for duty-cycle for RCG")
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220612145955.385787-2-nikita@trvn.ru
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/qcom/clk-rcg2.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 8e5dce09d162..2375e8122012 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -437,7 +437,7 @@ static int clk_rcg2_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) static int clk_rcg2_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); - u32 notn_m, n, m, d, not2d, mask, duty_per; + u32 notn_m, n, m, d, not2d, mask, duty_per, cfg; int ret; /* Duty-cycle cannot be modified for non-MND RCGs */ @@ -448,6 +448,11 @@ static int clk_rcg2_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) regmap_read(rcg->clkr.regmap, RCG_N_OFFSET(rcg), ¬n_m); regmap_read(rcg->clkr.regmap, RCG_M_OFFSET(rcg), &m); + regmap_read(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), &cfg); + + /* Duty-cycle cannot be modified if MND divider is in bypass mode. */ + if (!(cfg & CFG_MODE_MASK)) + return -EINVAL; n = (~(notn_m) + m) & mask; |