diff options
author | Robert Foss <robert.foss@linaro.org> | 2022-11-02 10:01:37 +0100 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-06 05:38:19 +0100 |
commit | e1a297a681bc4ab2c5cfe31eb4b59bb6f202035a (patch) | |
tree | f5e10c22d6727666b92c1d560bc447b76f43df7d /drivers/clk | |
parent | clk: qcom: dispcc-sm8250: Disable EDP_GTC for sm8350 (diff) | |
download | linux-e1a297a681bc4ab2c5cfe31eb4b59bb6f202035a.tar.xz linux-e1a297a681bc4ab2c5cfe31eb4b59bb6f202035a.zip |
clk: qcom: dispcc-sm8250: Add RETAIN_FF_ENABLE flag for mdss_gdsc
All SoC supported by this driver supports the RETAIN_FF_ENABLE flag,
so it should be enabled here.
This feature enables registers to maintain their state after
dis/re-enabling the GDSC.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-3-robert.foss@linaro.org
Diffstat (limited to 'drivers/clk')
-rw-r--r-- | drivers/clk/qcom/dispcc-sm8250.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 180ac2726f7e..a7606580cf22 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -1137,7 +1137,7 @@ static struct gdsc mdss_gdsc = { .name = "mdss_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL, + .flags = HW_CTRL | RETAIN_FF_ENABLE, }; static struct clk_regmap *disp_cc_sm8250_clocks[] = { |