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authorJerome Brunet <jbrunet@baylibre.com>2018-02-14 14:43:35 +0100
committerStephen Boyd <sboyd@kernel.org>2018-03-12 23:10:22 +0100
commit04bf9ab3359ff89059509ee5c35446c45b9cdaaa (patch)
tree4c72bf3dd197f468b1fd657b3e43e40dc34d60e0 /drivers/clk
parentclk: migrate the count of orphaned clocks at init (diff)
downloadlinux-04bf9ab3359ff89059509ee5c35446c45b9cdaaa.tar.xz
linux-04bf9ab3359ff89059509ee5c35446c45b9cdaaa.zip
clk: fix determine rate error with pass-through clock
If we try to determine the rate of a pass-through clock (a clock which does not implement .round_rate() nor .determine_rate()), clk_core_round_rate_nolock() will directly forward the call to the parent clock. In the particular case where the pass-through actually does not have a parent, clk_core_round_rate_nolock() will directly return 0 with the requested rate still set to the initial request structure. This is interpreted as if the rate could be exactly achieved while it actually cannot be adjusted. This become a real problem when this particular pass-through clock is the parent of a mux with the flag CLK_SET_RATE_PARENT set. The pass-through clock will always report an exact match, get picked and finally error when the rate is actually getting set. This is fixed by setting the rate inside the req to 0 when core is NULL in clk_core_round_rate_nolock() (same as in __clk_determine_rate() when hw is NULL) Fixes: 0f6cc2b8e94d ("clk: rework calls to round and determine rate callbacks") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/clk.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 6d54e933c901..cca05ea2c058 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1125,8 +1125,10 @@ static int clk_core_round_rate_nolock(struct clk_core *core,
{
lockdep_assert_held(&prepare_lock);
- if (!core)
+ if (!core) {
+ req->rate = 0;
return 0;
+ }
clk_core_init_rate_req(core, req);