diff options
| author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2014-02-20 00:14:41 +0100 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2014-03-11 23:05:18 +0100 |
| commit | 5f0ba3b462b2d36b3c28748863747fb1050f40d0 (patch) | |
| tree | 7260b5c7cb377290f08f52f620fb39f271c6a8b1 /drivers/clocksource/cadence_ttc_timer.c | |
| parent | clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI (diff) | |
| download | linux-5f0ba3b462b2d36b3c28748863747fb1050f40d0.tar.xz linux-5f0ba3b462b2d36b3c28748863747fb1050f40d0.zip | |
clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled
The timer core takes care of serialization and IRQs. Hence the driver is
no longer required to disable interrupts when calling
clockevents_update_freq().
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/clocksource/cadence_ttc_timer.c')
| -rw-r--r-- | drivers/clocksource/cadence_ttc_timer.c | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c index 63f176de0d02..f05b9fdc7425 100644 --- a/drivers/clocksource/cadence_ttc_timer.c +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -321,25 +321,12 @@ static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, switch (event) { case POST_RATE_CHANGE: - { - unsigned long flags; - - /* - * clockevents_update_freq should be called with IRQ disabled on - * the CPU the timer provides events for. The timer we use is - * common to both CPUs, not sure if we need to run on both - * cores. - */ - local_irq_save(flags); - clockevents_update_freq(&ttcce->ce, - ndata->new_rate / PRESCALE); - local_irq_restore(flags); - /* update cached frequency */ ttc->freq = ndata->new_rate; + clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE); + /* fall through */ - } case PRE_RATE_CHANGE: case ABORT_RATE_CHANGE: default: |