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authorDmitry Osipenko <digetx@gmail.com>2019-06-03 20:59:41 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2019-06-25 19:49:18 +0200
commit77d57d1d8016696daaf5614c070ac01c9652f4ce (patch)
tree699922341a82a4f3191ff08f9f65f4022d151a89 /drivers/clocksource
parentclocksource/drivers/tegra: Unify timer code (diff)
downloadlinux-77d57d1d8016696daaf5614c070ac01c9652f4ce.tar.xz
linux-77d57d1d8016696daaf5614c070ac01c9652f4ce.zip
clocksource/drivers/tegra: Reset hardware state on init
Reset timer's hardware state to ensure that initially it is in a predictable state. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource')
-rw-r--r--drivers/clocksource/timer-tegra20.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c
index acd68c77fa91..3e4f12aee8df 100644
--- a/drivers/clocksource/timer-tegra20.c
+++ b/drivers/clocksource/timer-tegra20.c
@@ -123,6 +123,9 @@ static int tegra_timer_setup(unsigned int cpu)
{
struct timer_of *to = per_cpu_ptr(&tegra_to, cpu);
+ writel(0, timer_of_base(to) + TIMER_PTV);
+ writel(TIMER_PCR_INTR_CLR, timer_of_base(to) + TIMER_PCR);
+
irq_force_affinity(to->clkevt.irq, cpumask_of(cpu));
enable_irq(to->clkevt.irq);