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| author | Atish Patra <atish.patra@wdc.com> | 2021-09-27 13:40:11 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2021-10-04 12:37:16 +0200 |
| commit | 3a9f66cb25e18a3eeca36c08d9f823a35b3ddc22 (patch) | |
| tree | a15be60b9addd26c0fde559d2f2a80cad0bda612 /drivers/clocksource | |
| parent | RISC-V: KVM: Implement MMU notifiers (diff) | |
| download | linux-3a9f66cb25e18a3eeca36c08d9f823a35b3ddc22.tar.xz linux-3a9f66cb25e18a3eeca36c08d9f823a35b3ddc22.zip | |
RISC-V: KVM: Add timer functionality
The RISC-V hypervisor specification doesn't have any virtual timer
feature.
Due to this, the guest VCPU timer will be programmed via SBI calls.
The host will use a separate hrtimer event for each guest VCPU to
provide timer functionality. We inject a virtual timer interrupt to
the guest VCPU whenever the guest VCPU hrtimer event expires.
This patch adds guest VCPU timer implementation along with ONE_REG
interface to access VCPU timer state from user space.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-riscv.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index c51c5ed15aa7..1767f8bf2013 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -13,10 +13,12 @@ #include <linux/delay.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/module.h> #include <linux/sched_clock.h> #include <linux/io-64-nonatomic-lo-hi.h> #include <linux/interrupt.h> #include <linux/of_irq.h> +#include <clocksource/timer-riscv.h> #include <asm/smp.h> #include <asm/sbi.h> #include <asm/timex.h> @@ -79,6 +81,13 @@ static int riscv_timer_dying_cpu(unsigned int cpu) return 0; } +void riscv_cs_get_mult_shift(u32 *mult, u32 *shift) +{ + *mult = riscv_clocksource.mult; + *shift = riscv_clocksource.shift; +} +EXPORT_SYMBOL_GPL(riscv_cs_get_mult_shift); + /* called directly from the low-level interrupt handler */ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) { |