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authorChristoph Hellwig <hch@lst.de>2018-08-04 10:23:16 +0200
committerPalmer Dabbelt <palmer@sifive.com>2018-08-13 17:31:31 +0200
commit6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde (patch)
treedc077f5075634c43587aa2658247e37b4004e59d /drivers/clocksource
parentRISC-V: add a definition for the SIE SEIE bit (diff)
downloadlinux-6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde.tar.xz
linux-6ea0f26a7913b2a72f9cbe84e77ad2cbeaaa9dde.zip
RISC-V: implement low-level interrupt handling
Add support for a routine that dispatches exceptions with the interrupt flags set to either the IPI or irqdomain code (and the clock source in the future). Loosely based on the irq-riscv-int.c irqchip driver from the RISC-V tree. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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