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authorGuo Ren <guoren@linux.alibaba.com>2020-08-18 09:31:17 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2020-08-24 13:01:39 +0200
commitbc6717d55d07110d8f3c6d31ec2af50c11b07091 (patch)
treed4114e38242097ba13268645f9b00fe0e60c59e9 /drivers/clocksource
parentclocksource/drivers/timer-ti-dm: Do reset before enable (diff)
downloadlinux-bc6717d55d07110d8f3c6d31ec2af50c11b07091.tar.xz
linux-bc6717d55d07110d8f3c6d31ec2af50c11b07091.zip
clocksource/drivers/timer-gx6605s: Fixup counter reload
When the timer counts to the upper limit, an overflow interrupt is generated, and the count is reset with the value in the TIME_INI register. But the software expects to start counting from 0 when the count overflows, so it forces TIME_INI to 0 to solve the potential interrupt storm problem. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Tested-by: Xu Kai <xukai@nationalchip.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1597735877-71115-1-git-send-email-guoren@kernel.org
Diffstat (limited to 'drivers/clocksource')
-rw-r--r--drivers/clocksource/timer-gx6605s.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-gx6605s.c b/drivers/clocksource/timer-gx6605s.c
index 80d0939d040b..8d386adbe800 100644
--- a/drivers/clocksource/timer-gx6605s.c
+++ b/drivers/clocksource/timer-gx6605s.c
@@ -28,6 +28,7 @@ static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
void __iomem *base = timer_of_base(to_timer_of(ce));
writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
+ writel_relaxed(0, base + TIMER_INI);
ce->event_handler(ce);