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author | Matthew Leach <matthew@mattleach.net> | 2016-06-08 20:30:56 +0200 |
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committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-06-10 11:55:32 +0200 |
commit | 4de103397bed108212ac8e382d9285eb6b2700bd (patch) | |
tree | bcb50d1c9557ac713f51036a0b3d28bfbe3337fc /drivers/cpufreq/intel_pstate.c | |
parent | clk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocks (diff) | |
download | linux-4de103397bed108212ac8e382d9285eb6b2700bd.tar.xz linux-4de103397bed108212ac8e382d9285eb6b2700bd.zip |
clk: samsung: fixup endian in pll clk
Fix the clk endian access code to deal with kernels built for big endian
operation.
Signed-off-by: Matthew Leach <matthew@mattleach.net>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/cpufreq/intel_pstate.c')
0 files changed, 0 insertions, 0 deletions