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authorWolfram Sang <wsa+renesas@sang-engineering.com>2017-07-19 10:27:51 +0200
committerWim Van Sebroeck <wim@iguana.be>2017-09-09 20:23:00 +0200
commitf6159dd4b085ad839ab02c1ba230535c53ef60d4 (patch)
tree98c3941f5ae61f4131277595ff355d8f7939d4bf /drivers/cpufreq/speedstep-centrino.c
parentwatchdog: mt7621: explicitly request exclusive reset control (diff)
downloadlinux-f6159dd4b085ad839ab02c1ba230535c53ef60d4.tar.xz
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watchdog: renesas_wdt: avoid (theoretical) type overflow
Because the smallest clock divider we can select is 1, 'clks_per_sec' must be the same type as 'rate'. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/cpufreq/speedstep-centrino.c')
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