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author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2016-11-17 22:47:47 +0100 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2016-11-17 22:47:47 +0100 |
commit | d0ea59e188941417a9fb5898d894b3106a8ad313 (patch) | |
tree | a5fdde28c81123f3221ca699914e8917441e6cd6 /drivers/cpufreq | |
parent | cpufreq: dt: Add support for r8a7743 and r8a7745 (diff) | |
download | linux-d0ea59e188941417a9fb5898d894b3106a8ad313.tar.xz linux-d0ea59e188941417a9fb5898d894b3106a8ad313.zip |
cpufreq: intel_pstate: Request P-states control from SMM if needed
Currently, intel_pstate is unable to control P-states on my
IvyBridge-based Acer Aspire S5, because they are controlled by SMM
on that machine by default and it is necessary to request OS control
of P-states from it via the SMI Command register exposed in the ACPI
FADT. intel_pstate doesn't do that now, but acpi-cpufreq and other
cpufreq drivers for x86 platforms do.
Address this problem by making intel_pstate use the ACPI-defined
mechanism as well. However, intel_pstate is not modular and it
doesn't need the module refcount tricks played by
acpi_processor_notify_smm(), so export the core of this function
to it as acpi_processor_pstate_control() and make it call that.
[The changes in processor_perflib.c related to this should not
make any functional difference for the acpi_processor_notify_smm()
users].
To be safe, only call acpi_processor_notify_smm() from intel_pstate
if ACPI _PPC support is enabled in it.
Suggested-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r-- | drivers/cpufreq/intel_pstate.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index f07e591c0e1f..ec1664bf6ef0 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -1909,9 +1909,20 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void) return false; } + +static void intel_pstate_request_control_from_smm(void) +{ + /* + * It may be unsafe to request P-states control from SMM if _PPC support + * has not been enabled. + */ + if (acpi_ppc) + acpi_processor_pstate_control(); +} #else /* CONFIG_ACPI not enabled */ static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } static inline bool intel_pstate_has_acpi_ppc(void) { return false; } +static inline void intel_pstate_request_control_from_smm(void) {} #endif /* CONFIG_ACPI */ static const struct x86_cpu_id hwp_support_ids[] __initconst = { @@ -1963,6 +1974,8 @@ hwp_cpu_matched: if (!hwp_active && hwp_only) goto out; + intel_pstate_request_control_from_smm(); + rc = cpufreq_register_driver(&intel_pstate_driver); if (rc) goto out; |