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authorTudor Ambarus <tudor-dan.ambarus@nxp.com>2016-09-30 11:09:39 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2016-10-02 16:33:45 +0200
commitf97581cfa6e7db9818520597b8a44f8268d75013 (patch)
tree3142b5190712e36c9c3d143086de0a1151c6f27a /drivers/crypto/caam/desc.h
parentcrypto: ccp - Make syslog errors human-readable (diff)
downloadlinux-f97581cfa6e7db9818520597b8a44f8268d75013.tar.xz
linux-f97581cfa6e7db9818520597b8a44f8268d75013.zip
crypto: caam - treat SGT address pointer as u64
Even for i.MX, CAAM is able to use address pointers greater than 32 bits, the address pointer field being interpreted as a double word. Enforce u64 address pointer in the sec4_sg_entry struct. This patch fixes the SGT address pointer endianness issue for 32bit platforms where core endianness != caam endianness. Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/caam/desc.h')
-rw-r--r--drivers/crypto/caam/desc.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index 26427c11ad87..513b6646bb36 100644
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -23,13 +23,7 @@
#define SEC4_SG_OFFSET_MASK 0x00001fff
struct sec4_sg_entry {
-#if !defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) && \
- defined(CONFIG_CRYPTO_DEV_FSL_CAAM_IMX)
- u32 rsvd1;
- dma_addr_t ptr;
-#else
u64 ptr;
-#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_IMX */
u32 len;
u32 bpid_offset;
};