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author | Horia Geantă <horia.geanta@nxp.com> | 2018-05-23 13:32:40 +0200 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2018-05-30 18:13:46 +0200 |
commit | 06d44c918a689e41215f763285061b3a99c56b6c (patch) | |
tree | 27f83f88903cc7d42f350a2239cd9bc46c25290a /drivers/crypto/caam/intern.h | |
parent | crypto: clarify licensing of OpenSSL asm code (diff) | |
download | linux-06d44c918a689e41215f763285061b3a99c56b6c.tar.xz linux-06d44c918a689e41215f763285061b3a99c56b6c.zip |
crypto: caam - fix MC firmware detection
Management Complex (MC) f/w detection is based on CTPR_MS[DPAA2] bit.
This is incorrect since:
-the bit is set for all CAAM blocks integrated in SoCs with a certain
Layerscape Chassis
-some SoCs with LS Chassis don't have an MC block (thus no MC f/w)
To fix this, MC f/w detection will be based on the presence of
"fsl,qoriq-mc" compatible string in the device tree.
Fixes: 297b9cebd2fc0 ("crypto: caam/jr - add support for DPAA2 parts")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/caam/intern.h')
-rw-r--r-- | drivers/crypto/caam/intern.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h index 7696a774a362..babc78abd155 100644 --- a/drivers/crypto/caam/intern.h +++ b/drivers/crypto/caam/intern.h @@ -82,6 +82,7 @@ struct caam_drv_private { */ u8 total_jobrs; /* Total Job Rings in device */ u8 qi_present; /* Nonzero if QI present in device */ + u8 mc_en; /* Nonzero if MC f/w is active */ int secvio_irq; /* Security violation interrupt number */ int virt_en; /* Virtualization enabled in CAAM */ int era; /* CAAM Era (internal HW revision) */ |