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authorMario Limonciello <mario.limonciello@amd.com>2022-03-31 23:12:10 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2022-04-08 10:25:19 +0200
commitcac32cd4f1436b0f926a9112039d3f7ce1cd6cab (patch)
tree4179e5bc5d7a1237b9abaf0eee8d468784a81c5c /drivers/crypto/ccp/psp-dev.h
parentcrypto: testmgr - test in-place en/decryption with two sglists (diff)
downloadlinux-cac32cd4f1436b0f926a9112039d3f7ce1cd6cab.tar.xz
linux-cac32cd4f1436b0f926a9112039d3f7ce1cd6cab.zip
crypto: ccp - cache capability into psp device
The results of the capability register will be used by future code at runtime rather than just initialization. Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to '')
-rw-r--r--drivers/crypto/ccp/psp-dev.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/crypto/ccp/psp-dev.h b/drivers/crypto/ccp/psp-dev.h
index ef38e4135d81..d811da28cce6 100644
--- a/drivers/crypto/ccp/psp-dev.h
+++ b/drivers/crypto/ccp/psp-dev.h
@@ -45,6 +45,8 @@ struct psp_device {
void *sev_data;
void *tee_data;
+
+ unsigned int capability;
};
void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
@@ -57,4 +59,7 @@ void psp_clear_tee_irq_handler(struct psp_device *psp);
struct psp_device *psp_get_master_device(void);
+#define PSP_CAPABILITY_SEV BIT(0)
+#define PSP_CAPABILITY_TEE BIT(1)
+
#endif /* __PSP_DEV_H */