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authorGilad Ben-Yossef <gilad@benyossef.com>2019-04-18 15:38:39 +0200
committerHerbert Xu <herbert@gondor.apana.org.au>2019-04-25 09:38:13 +0200
commitf98f6e2134bd3ee5db0594dc399f9562ecc2d08a (patch)
tree6b75947469d9fd44f3ab259e700befb111a26231 /drivers/crypto/ccree/cc_driver.h
parentcrypto: ccree - move MLLI desc. before key load (diff)
downloadlinux-f98f6e2134bd3ee5db0594dc399f9562ecc2d08a.tar.xz
linux-f98f6e2134bd3ee5db0594dc399f9562ecc2d08a.zip
crypto: ccree - add support for sec disabled mode
Add support for the Security Disabled mode under which only pure cryptographic functionality is enabled and protected keys services are unavailable. Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/ccree/cc_driver.h')
-rw-r--r--drivers/crypto/ccree/cc_driver.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/crypto/ccree/cc_driver.h b/drivers/crypto/ccree/cc_driver.h
index 33dbf3e6d15d..ff474891221e 100644
--- a/drivers/crypto/ccree/cc_driver.h
+++ b/drivers/crypto/ccree/cc_driver.h
@@ -65,6 +65,8 @@ enum cc_std_body {
#define CC_COMP_IRQ_MASK BIT(CC_HOST_IRR_AXIM_COMP_INT_BIT_SHIFT)
+#define CC_SECURITY_DISABLED_MASK BIT(CC_SECURITY_DISABLED_VALUE_BIT_SHIFT)
+
#define AXIM_MON_COMP_VALUE GENMASK(CC_AXIM_MON_COMP_VALUE_BIT_SIZE + \
CC_AXIM_MON_COMP_VALUE_BIT_SHIFT, \
CC_AXIM_MON_COMP_VALUE_BIT_SHIFT)
@@ -136,6 +138,7 @@ struct cc_drvdata {
u32 sig_offset;
u32 ver_offset;
int std_bodies;
+ bool sec_disabled;
};
struct cc_crypto_alg {
@@ -162,6 +165,7 @@ struct cc_alg_template {
int auth_mode;
u32 min_hw_rev;
enum cc_std_body std_body;
+ bool sec_func;
unsigned int data_unit;
struct cc_drvdata *drvdata;
};