diff options
| author | Rohit Maheshwari <rohitm@chelsio.com> | 2020-03-07 15:36:05 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-03-09 05:16:23 +0100 |
| commit | 5a4b9fe7fece62ecab6fb28fe92362f83b41c33e (patch) | |
| tree | 2c7d7dae74fe96071650099bb131d92609781cd1 /drivers/crypto/chelsio/chcr_common.h | |
| parent | cxgb4/chcr: Save tx keys and handle HW response (diff) | |
| download | linux-5a4b9fe7fece62ecab6fb28fe92362f83b41c33e.tar.xz linux-5a4b9fe7fece62ecab6fb28fe92362f83b41c33e.zip | |
cxgb4/chcr: complete record tx handling
Added tx handling in this patch. This includes handling of segments
contain single complete record.
v1->v2:
- chcr_write_cpl_set_tcb_ulp is added in this patch.
v3->v4:
- mss calculation logic.
- replaced kfree_skb with dev_kfree_skb_any.
- corrected error message reported by kbuild test robot <lkp@intel.com>
Signed-off-by: Rohit Maheshwari <rohitm@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/crypto/chelsio/chcr_common.h')
| -rw-r--r-- | drivers/crypto/chelsio/chcr_common.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/crypto/chelsio/chcr_common.h b/drivers/crypto/chelsio/chcr_common.h index 852f64322326..f4ccea68df6f 100644 --- a/drivers/crypto/chelsio/chcr_common.h +++ b/drivers/crypto/chelsio/chcr_common.h @@ -9,6 +9,11 @@ #define CHCR_MAX_SALT 4 #define CHCR_KEYCTX_MAC_KEY_SIZE_128 0 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0 +#define CHCR_SCMD_CIPHER_MODE_AES_GCM 2 +#define CHCR_CPL_TX_SEC_PDU_LEN_64BIT 2 +#define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3 +#define CHCR_SCMD_PROTO_VERSION_TLS 0 +#define CHCR_SCMD_AUTH_MODE_GHASH 4 enum chcr_state { CHCR_INIT = 0, @@ -93,4 +98,35 @@ static inline void *chcr_copy_to_txd(const void *src, const struct sge_txq *q, } return p; } + +static inline unsigned int chcr_txq_avail(const struct sge_txq *q) +{ + return q->size - 1 - q->in_use; +} + +static inline void chcr_txq_advance(struct sge_txq *q, unsigned int n) +{ + q->in_use += n; + q->pidx += n; + if (q->pidx >= q->size) + q->pidx -= q->size; +} + +static inline void chcr_eth_txq_stop(struct sge_eth_txq *q) +{ + netif_tx_stop_queue(q->txq); + q->q.stops++; +} + +static inline unsigned int chcr_sgl_len(unsigned int n) +{ + n--; + return (3 * n) / 2 + (n & 1) + 2; +} + +static inline unsigned int chcr_flits_to_desc(unsigned int n) +{ + WARN_ON(n > SGE_MAX_WR_LEN / 8); + return DIV_ROUND_UP(n, 8); +} #endif /* __CHCR_COMMON_H__ */ |